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74LVC245A
LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (NOT INVERTED) HIGH PERFORMANCE
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5V TOLERANT INPUTS HIGH SPEED: tPD = 6.3ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245 LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
SOP
TSSOP
Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVC245AMTR 74LVC245ATTR
DESCRIPTION The 74LVC245A is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. This IC is intended for two-way asynchronous communication between data buses and the Figure 1: Pin Connection And IEC Logic Symbols
direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
July 2004
.
Rev. 4
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74LVC245A
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
PIN N 1 2, 3, 4, 5, 6, 7, 8, 9 18, 17, 16, 15, 14, 13, 12, 11 19 10 20 SYMBOL DIR A1 to A8 B1 to B8 NAME AND FUNCTION Directional Control Data Inputs/Outputs Data Inputs/Outputs
Table 3: Truth Table
INPUTS G L L H DIR L H X FUNCTION A BUS B BUS OUTPUT Yn A=B B=A Z
OUTPUT INPUT INPUT OUTPUT Z Z
G GND VCC
Output Enable Input Ground (0V) Positive Supply Voltage
X : Don't Care Z : High Impedance
Table 4: Absolute Maximum Ratings
Symbol VCC VI VO VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage (High Impedance or VCC = 0V) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 50 - 50 50 100 -65 to +150 300 Unit V V V V mA mA mA mA C C
ICC or IGND DC VCC or Ground Current per Supply Pin Tstg Storage Temperature TL Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND
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Table 5: Recommended Operating Conditions
Symbol VCC VI VO VO IOH, IOL IOH, IOL IOH, IOL IOH, IOL Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage (High Impedance or VCC = 0V) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.7 to 3.0V) High or Low Level Output Current (VCC = 2.3 to 2.7V) High or Low Level Output Current (VCC = 1.65 to 2.3V) Operating Temperature Input Rise and Fall Time (note 2) Parameter Value 1.65 to 3.6 0 to 5.5 0 to 5.5 0 to VCC 24 12 8 4 -55 to 125 0 to 10 Unit V V V V mA mA mA mA C ns/V
1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V at VCC = 3.0V
Table 6: DC Specifications
Test Condition Symbol Parameter VCC (V) 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 1.65 to 3.6 1.65 2.3 2.7 3.0 3.0 VOL Low Level Output Voltage 1.65 to 3.6 1.65 2.3 2.7 3.0 II Ioff IOZ Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input 3.6 0 3.6 IO=-100 A IO=-4 mA IO=-8 mA IO=-12 mA IO=-18 mA IO=-24 mA IO=100 A IO=4 mA IO=8 mA IO=12 mA IO=24 mA VI = 0 to 5.5V VI or VO = 5.5V VI = VIH orVIL VO = 0 to 5.5V VI = VCC or GND 3.6 2.7 to 3.6 VI or VO = 3.6 to 5.5V VIH = VCC-0.6V VCC-0.2 1.2 1.7 2.2 2.4 2.2 0.2 0.45 0.7 0.4 0.55 5 10 10 -40 to 85 C Min. 0.65VCC 1.7 2 0.35VCC 0.7 0.8 VCC-0.2 1.2 1.7 2.2 2.4 2.2 0.2 0.45 0.7 0.4 0.55 5 10 10 A A A V V Max. Value -55 to 125 C Min. 0.65VCC 1.7 2 0.35VCC 0.7 0.8 V V Max. Unit
VIH
High Level Input Voltage Low Level Input Voltage High Level Output Voltage
VIL
VOH
ICC
10 10 500
10 10 500 A A 3/12
ICC
74LVC245A
Table 7: Dynamic Switching Characteristics
Test Condition Symbol Parameter VCC (V) 3.3 CL = 50pF VIL = 0V, VIH = 3.3V Value TA = 25 C Min. Typ. 0.8 -0.8 Max. V Unit
VOLP VOLV
Dynamic Low Level Quiet Output (note 1)
1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.
Table 8: AC Electrical Characteristics
Test Condition Symbol Parameter VCC (V) CL (pF) 30 30 50 50 30 30 50 50 30 30 50 50 RL () 1000 500 500 500 1000 500 500 500 1000 500 500 500 ts = t r (ns) 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 2.0 2.0 2.5 2.5 -40 to 85 C Min. 2.0 2.0 1.5 1.0 2.0 2.0 1.0 1.0 2.0 2.0 2.0 2.0 Max. 9.0 8.0 7.3 6.3 12 9.5 9.0 8.5 11 9.0 8.5 7.5 1 Value -55 to 125 C Min. 2.0 2.0 1.5 1.0 2.0 2.0 1.0 1.0 2.0 2.0 2.0 2.0 Max. 12 10.5 8.8 7.6 16 12.5 11 10 14 12 10 9.0 1 Unit
tPLH tPHL
Propagation Delay Time
tPZL tPZH
tPLZ tPHZ
tOSLH tOSHL
1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 Output Enable Time 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 Output Disable Time 1.65 to 1.95 2.3 to 2.7 2.7 3.0 to 3.6 Output To Output 2.7 to 3.6 Skew Time (note1, 2)
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn| 2) Parameter guaranteed by design
Table 9: Capacitive Characteristics
Test Condition Symbol Parameter VCC (V) Value TA = 25 C Min. fIN = 10MHz Typ. 4 1.8 2.5 3.3 28 30 34 Max. pF pF Unit
CIN CPD
Input Capacitance Power Dissipation Capacitance (note 1)
1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
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Figure 3: Test Circuit
RT = ZOUT of pulse generator (typically 50)
Table 10: Test Circuit And Waveform Symbol Value
Symbol 1.65 to 1.95V CL RL = R1 VS VIH VM VOH VX VY tr = tr 30pF 1000 2 x VCC VCC VCC/2 VCC VOL + 0.15V VOH - 0.15V <2.0ns 2.3 to 2.7V 30pF 500 2 x VCC VCC VCC/2 VCC VOL + 0.15V VOH - 0.15V <2.0ns VCC 2.7V 50pF 500 6V 2.7V 1.5V 3.0V VOL + 0.3V VOH - 0.3V <2.5ns 3.0 to 3.6V 50pF 500 6V 2.7V 1.5V 3.0V VOL + 0.3V VOH - 0.3V <2.5ns
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
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Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
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74LVC245A
SO-20 MECHANICAL DATA
DIM. A A1 B C D E e H h L k ddd 10.00 0.25 0.4 0 mm. MIN. 2.35 0.1 0.33 0.23 12.60 7.4 1.27 10.65 0.75 1.27 8 0.100 0.394 0.010 0.016 0 TYP MAX. 2.65 0.30 0.51 0.32 13.00 7.6 MIN. 0.093 0.004 0.013 0.009 0.496 0.291 0.050 0.419 0.030 0.050 8 0.004 inch TYP. MAX. 0.104 0.012 0.020 0.013 0.512 0.299
0016022D
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TSSOP20 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 6.4 6.2 4.3 6.5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 6.6 6.6 4.48 0.002 0.031 0.007 0.004 0.252 0.244 0.169 0.256 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.260 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0087225C
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74LVC245A
Tape & Reel SO-20 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 10.8 13.2 3.1 3.9 11.9 12.8 20.2 60 30.4 11 13.4 3.3 4.1 12.1 0.425 0.520 0.122 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.433 0.528 0.130 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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74LVC245A
Tape & Reel TSSOP20 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.8 6.9 1.7 3.9 11.9 12.8 20.2 60 22.4 7 7.1 1.9 4.1 12.1 0.268 0.272 0.067 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.276 0.280 0.075 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch
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Table 11: Revision History
Date 26-Jul-2004 Revision 4 Description of Changes Ordering Codes Revision - pag. 1.
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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